Process for producing macroscopic cavities beneath the surface of a silicon wafer
US6750153B2 · kind B2 · utility
2Cited by
5References
41Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 24, 2001 |
| Grant date | Jun 15, 2004 |
| Priority date | — |
| Expiry date | Nov 17, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/308
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A silicon element having macrocavities beneath its exterior surface is fabricated by electrochemical etching of a p-type silicon wafer. Etching at a high current density results in the formation of deep macrocavities overhung by a layer of crystalline silicon. The process works with both aqueous and non-aqueous electrolytes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.