Semiconductor device
US6750541B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 23, 2002 |
| Grant date | Jun 15, 2004 |
| Priority date | — |
| Expiry date | Apr 23, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device having a multi-layered wiring structure containing a copper layer, comprises a first insulating film formed over a semiconductor substrate, a first copper pattern buried in the first insulating film, a cap layer formed on the first copper pattern and the first insulating film and made of a substance a portion of which formed on the first copper pattern has a smaller electrical resistance value than a portion formed on the first insulating film, second insulating films formed on the cap layer, and a second copper pattern buried in a hole or a trench, which is formed in the second insulating films on the first copper pattern, and connected electrically to the first copper pattern via the cap layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.