Non-volatile memory control
US6751155B2 · kind B2 · utility
173Cited by
10References
2Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 27, 2002 |
| Grant date | Jun 15, 2004 |
| Priority date | — |
| Expiry date | Oct 11, 2022 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to an embodiment of the present invention, there is provided a method and apparatus for use in a memory system having a non-volatile memory and a controller for limiting the number of non-volatile memory arrays from a plurality of available arrays accessed at one time, wherein the method comprises implementing a pipelining sequence for transferring data to and from the non-volatile memory arrays and limiting the number of active arrays operating at one time, the arrangement being such that the controller waits for the at least one of the arrays to complete before initiating the transfer to and from a further array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.