Method and system for using a combined power detect and presence detect signal to determine if a memory module is connected and receiving power
US6751740B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 11, 2000 |
| Grant date | Jun 15, 2004 |
| Priority date | — |
| Expiry date | Dec 15, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/143
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for providing a common power detect and presence detect signal. In one embodiment, a memory module includes a voltage regulator and a power detector circuit. The voltage regulator may be configured to provide a stable operating voltage to the various circuits of the memory module. The power detector circuit may be configured to detect the presence of the operating voltage from the output of the voltage regulator. The power detector circuit may assert an output signal in response to a detection of a voltage from the voltage regulator. The output signal asserted by the power detector circuit may then be driven through a single pin of a connector mounted to the memory module to a storage unit of the host computer system. The storage unit may be configured to store the state of the output signal. Instructions executed by a central processing unit (CPU) of the computer system may cause the state of the output signal to be periodically read from the storage unit, and provide an indication as to whether the voltage regulator is providing the operating voltage. If the memory module is not receiving the correct operating voltage, or it is not present, an indication of th…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.