Computer power management apparatus and method for optimizing CPU throttling
US6751741B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 4, 2000 |
| Grant date | Jun 15, 2004 |
| Priority date | — |
| Expiry date | Feb 4, 2020 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method to reduce the power dissipation of a system by omitting an unnecessary CPU throttling operation in a power management apparatus that performs the CPU throttling operation. A power management apparatus 10 is constituted by an event detecting section 12 to detect an event in a system, an activity detecting section 14 to decide whether the system is in a busy state or in an idle state by checking whether or not there is activity in the system, and a clock control section 16 to execute CPU-clock control. The control section 16 does not perform an unnecessary CPU throttling operation, by stopping the CPU throttling operation when the system is in the idle state and performing the CPU throttling operation only when the system is in the busy state. With this, the power dissipation of the system can be considerably reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.