Photodetector with isolation implant region for reduced device capacitance and increased bandwidth
US6753214B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 15, 2002 |
| Grant date | Jun 22, 2004 |
| Priority date | — |
| Expiry date | Feb 15, 2022 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02E10/50
Abstract
A PIN photodetector includes reduced parasitic capacitance and is suitable for high-speed applications. Metal interconnect leads are coupled to the photodetector and extend over electrically insulating regions which reduce or eliminate parasitic capacitance. The electrically insulating regions may be formed by a deep proton implantation process which introduces impurities into the N-type layer, P-type layer and intrinsic layer in portions of the inactive area according to one embodiment. In another embodiment, the electrically insulating regions may be formed by removing parts of the film stack that includes N-type layer, P-type layer and intrinsic layer, from portions of the inactive area, introducing impurities and optionally adding a dielectric material. The PIN photodetector may take on the shape of a mesa to provide contact to each of the upper and lower electrodes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.