Method for low k dielectric deposition
US6753269B1 · kind B1 · utility
1Cited by
3References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 8, 2003 |
| Grant date | Jun 22, 2004 |
| Priority date | — |
| Expiry date | May 8, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76831
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides a method for forming an intermediate trench layer through low k dielectric material deposition in a damascene process for manufacturing semiconductor devices. After depositing a low k dielectric material block, a curing process is applied to the low k dielectric material block for a predetermined curing time period, wherein after the curing time period, the low k dielectric material block forms a first and second low k dielectric layers so as to make the first low k dielectric layer an intermediate trench layer, thereby eliminating the need of an etch stop layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.