Switched capacitor array circuits having universal rest state and method
US6753623B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 5, 2000 |
| Grant date | Jun 22, 2004 |
| Priority date | — |
| Expiry date | Apr 14, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M3/07
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A switched capacitor array circuit for use in a voltage regulator, including L, M and N banks of capacitor positions disposed intermediate an input node and a ground node, between the input and output nodes and between the output node and the ground node, respectively. Switching circuitry operates to switch three capacitors between a common phase configuration and a gain phase configuration. Two of the capacitors are disposed in one of the L, M and N banks of capacitor positions, with the third capacitor being disposed in a different one of the L, M and N banks of capacitor positions in the common phase configuration. When switched from the common phase to the gain phase configuration, at least one of the three capacitors is moved to a different capacitor position.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.