Method of subdividing a wafer

US6756288B1 · kind B1 · utility

Assignee

• Fraunhofer-Gesellschaft zur förderung der angewandten Forschung e.V. · DE

Inventors

• Michael Feil · Munich, DE
• Christof Landesberger · Gräfelfing, DE
• Armin Klumpp · Hersbruck, DE
• Erwin Hacker · Hochheim, DE

Key dates

• Filing date: Jun 3, 2002
• Grant date: Jun 29, 2004
• Expiry date: Dec 20, 2022

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10T29/4979
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

In a method of dicing a wafer, which comprises a plurality of individual circuit structures, a trench is first defined between at least two circuit structures on one face of the wafer. Subsequently, the trench is deepened down to a defined depth. Following this, one face of the wafer has fixed thereto a re-detachable intermediate support composed of a fixed intermediate support substrate and an adhesive medium which is applied to said intermediate support substrate and which can specifically be modified in terms of its adhesive strength, whereupon the wafer is dry-etched from the opposite face so that circuit chips are obtained which are connected to one another only via the intermediate support. Subsequently, the circuit chips are removed from the intermediate support. This method substantially reduces mechanical impairments that may occur during dicing of the circuit chips; on the one hand, this permits the production of circuit chips with a thickness of less than 50 &mgr;m and, on the other hand, it leads to mechanically substantially undamaged circuit chips.