Metal contact structure and method for thin film transistor array in liquid crystal display
US6757031B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 9, 2001 |
| Grant date | Jun 29, 2004 |
| Priority date | — |
| Expiry date | Dec 13, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6743
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
Disclosed is a metal contact structure and method for a thin film transistor array in liquid crystal display in order to prevent source/drain electrode metal layer from plasma damage and oxide insulator formation thereon during contact hole process, such that low contact resistance is obtained between the source/drain electrode metal layer and top-ITO conductive layer, wherein a thin film transistor structure is formed on a substrate and a metal oxide conductive film is covered on the source/drain electrode metal layer of the thin film transistor structure before an insulative passivation layer is deposited over the thin film transistor structure. During the passivation layer is etched to form contact hole for the source/drain electrode metal layer to contact with the top-ITO conductive layer thereafter formed, the metal oxide conductive film prevents the underlying source/drain electrode metal layer from plasma damage and oxide insulator formation thereon, thereby obtaining good contact between the source/drain electrode metal layer and the top-ITO conductive layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.