Pin-to-pin ESD-protection structure having cross-pin activation
US6757147B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 3, 2002 |
| Grant date | Jun 29, 2004 |
| Priority date | — |
| Expiry date | Aug 13, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/601
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A cross-pin electro-static-discharge (ESD) protection device protects against ESD zaps between two I/O pins. Pin A is connected to a drain of a bus-switch transistor and pin B is connected to the transistor's source. An ESD protection device on pin A has an n-channel shunting transistor to an internal ground bus. The gate of the shunting transistor is a cross-gate node that is capacitivly coupled to pin A, and has a leaker resistor to ground. An n-channel cross-grounding transistor has its gate connected to the same cross-gate node, but it connects the internal ground bus to pin B, which is grounded in the pin-to-pin ESD test. An ESD pulse on pin A drives the cross-gate node high, turning on both the shunting transistor and the cross-grounding transistor. The floating internal ground bus is connected to ground by pin B, grounding the substrate of the bus-switch transistor to prevent its turn-on.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.