Method and apparatus for output rate regulation and control associated with a packet pipeline
US6757249B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 14, 1999 |
| Grant date | Jun 29, 2004 |
| Priority date | — |
| Expiry date | Oct 14, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L47/10
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An apparatus having a pipeline having a series of stages. At least one of the pipeline stages has a first interface for coupling to a memory that stores output capacity information for a packet. The output capacity information is obtainable from the packet's packet header information or internal information where the internal information is used within a service provider's network. At least one of the pipeline stages has a second interface that receives packet size information; a third interface that receives the output capacity information; and comparison logic coupled to the second and third interfaces.A method that involves presenting packet header information and packet size information to one or more pipeline stages where the packet header information and the packet size information correspond to a packet. Then, determining within a stage associated with the pipeline, with the packet header information, output capacity for the packet. Then, comparing within a stage associated with the pipeline, the output capacity with the packet size to determine appropriate delay for the packet.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.