Fast switching of data packet with common time reference
US6757282B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 28, 2000 |
| Grant date | Jun 29, 2004 |
| Priority date | — |
| Expiry date | Mar 28, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04Q2011/005
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
An input buffer switch scheduling method operates responsively to a global common time reference. The global time reference is used to enable pre-computed switching schedules from an input port to an output port, thereby, expediting switching and increasing the performance and scalability of the switching system. In the switch architecture disclosed in this invention the switching fabric operates according to predefined switching schedules. The switch decodes the data packet headers in order to determine the destination output port and the switching time responsive to the global common time reference. This decoded switching time is then used by the pre-defined switching schedules in order to switch the data packet from the input port to the output port. The usage of predefined switching schedules provides scalability to the design of high performance input buffer switch design.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.