Multiple module content addressable memories
US6757780B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 9, 2002 |
| Grant date | Jun 29, 2004 |
| Priority date | — |
| Expiry date | Sep 15, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F16/90339
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and device for arranging and storing data in a memory and for extracting the data from the memory in response to an input key, the method including the steps of: (a) providing a device including: (i) a memory having a plurality of module pairs, each of the module pairs having: (A) a key module including a first array of cells, the first array having at least two dimensions and having rows and columns, the first array containing a plurality of keys, each of the cells having a unique address and being accessible via an input key, the keys within each of the key modules being arranged in monotonic order, and (B) an associated data module including a second array of cells, the second array having at least two dimensions and having rows and columns, the second array having a plurality of data entries, associated with the keys, wherein the memory is designed and configured such that each of the data entries is associated with a particular one of the keys, and (ii) processing means, and (b) performing a processing operation, using the processing means on each the key module in parallel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.