Microprocessor with instructions for shifting data responsive to a signed count value
US6757819B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 31, 2000 |
| Grant date | Jun 29, 2004 |
| Priority date | — |
| Expiry date | Jun 1, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30072
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing system is provided with a digital signal processor which has an instruction for shifting a source operand in response to a signed shift count value and storing the shifted result in a selected destination register. A first 32-bit operand (600) is treated as a signed shift value that has a sign and a shift count value. A second operand (602) is shifted by an amount according to the shift count value and in a direction according to the sign of the shift count. One instruction is provided that performs a right shift for a positive shift count and a left shift for a negative shift count, and another instruction is provided performs a left shift for a positive shift count and a right shift for a negative shift count. If the shift count value is greater than 31, then the shift is limited to 31.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.