Length matrix generator for register transfer level code
US6757885B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 31, 2002 |
| Grant date | Jun 29, 2004 |
| Priority date | — |
| Expiry date | Jan 10, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/327
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of generating a length matrix for register transfer level code includes steps for receiving as input register transfer level code, an I/O block list, a plurality of compile units, and a user defined hierarchical depth; mapping the register transfer level code to a design library, generating a connectivity matrix for the plurality of compile units, generating a priority list of interconnections from the connectivity matrix, generating placement coordinates for the compile units from the priority list of interconnections and the connectivity matrix, and generating as output at least one of the connectivity matrix and the placement coordinates.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.