Semiconductor device and method of manufacturing the same
US6759722B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Mar 30, 2001 |
| Grant date | Jul 6, 2004 |
| Priority date | — |
| Expiry date | Mar 30, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In the present semiconductor device, a chip with an LSI circuit is secured to a board 3 (with the chip flipped) so as to be level. The LSI circuit on the chip is specified to operate normally only when the chip is level. Further, the back of the chip is processed so as to give stress to the chip. The chip has a reduced thickness of 50 &mgr;m or less (alternatively 30 &mgr;m to 50 &mgr;m). Therefore, when the chip is detached from the board, it deforms and is no longer level due to the stress, which prohibits the LSI circuit from operating normally. This way, the present semiconductor device ensures that no analysis can be conducted on the LSI circuit once the chip is detached.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.