Formation of an isolating wall
US6759726B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 22, 1999 |
| Grant date | Jul 6, 2004 |
| Priority date | — |
| Expiry date | Oct 22, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/2257
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming an isolating wall in a semiconductor substrate of a first conductivity type, including the steps of boring in the substrate separate recesses according to the desired isolating wall contour; filling the recesses with a material containing a dopant of the second conductivity type; and performing an anneal step so that regions of the second conductivity type diffused from neighboring recesses join. A first series of recesses is formed from the upper surface and a second series of recesses is formed from the lower surface. The recesses have a substantially rectangular section, the large dimension of which is perpendicular to the alignment of the recesses and a depth smaller than or equal to the half-thickness of the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.