Semiconductor device with circuit cell array and arrangement on a semiconductor chip
US6759732B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 20, 2000 |
| Grant date | Jul 6, 2004 |
| Priority date | — |
| Expiry date | Mar 20, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor integrated circuit for driving an LCD. The circuit has a shift register circuit portion (3) and a driver circuit portion (7). All the stages of the shift register circuit portion are formed adjacently to the outer fringe of a chip (30). All the stages of the driver circuit portion are formed along the central line (L1) of the chip. Signal electrodes (81-8n) for individual bits are formed in a belt-like region (33) extending in the X-direction along the central line (L1) and adjacently to the driver circuit portion. Output electrodes are arranged in a zigzag fashion. Since the output electrodes overlap with each other in the Y-direction, the width of the chip can be suppressed. Power supply voltages (VH, V0, V2, V3, V5) are applied to the driver circuit portion (7) through leads (36-40). These leads are connected so as to form a closed loop making one revolution around the output electrodes (81-8N) located in the center of the chip. The leads do not intersect with each other, thus making the impedances of the leads uniform. As a result, the nonuniformity of the contrast of the display can be suppressed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.