Array of dice for testing integrated circuits
US6759865B1 · kind B1 · utility
12Cited by
13References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 30, 2002 |
| Grant date | Jul 6, 2004 |
| Priority date | — |
| Expiry date | Jul 30, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2889
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
In one embodiment, a test interface for testing integrated circuits includes an array of dice. A removable electrical connection (e.g., an interposer) may be coupled between the array of dice and a wafer containing multiple dice to be tested. The removable electrical connection allows electrical signals to be transmitted between the array of dice and the wafer. The test interface may be used in conjunction with a tester.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.