Semiconductor integrated circuit
US6759876B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 24, 2002 |
| Grant date | Jul 6, 2004 |
| Priority date | — |
| Expiry date | Dec 24, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0963
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The semiconductor integrated circuit of this invention includes a first transistor for setting a first node at a first logic level in accordance with a clock signal; an input circuit for setting the first node at a second logic level in accordance with an input signal; a second transistor for setting a second node at the first logic level when the first node is at the first logic level; a resistor device connected between the first node and the second node; a first driving transistor for receiving, as an input, potential of the second node and controlling whether or not an output node is set at the first logic level; and a second driving transistor for receiving, as an input, a signal at a logic level identical to the logic level of the first node and controlling whether or not the output node is set at the second logic level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.