Switched phase dual-modulus prescaler circuit having means for reducing power consumption
US6760398B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 24, 2002 |
| Grant date | Jul 6, 2004 |
| Priority date | — |
| Expiry date | Sep 24, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/18
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The dual-modulus prescaler circuit for a frequency includes several dividers-by-two of the asynchronous type, connected in series, a phase selector unit (11) inserted between two of the dividers-by-two (10, 12a) and a control unit for supplying first control signals(S0, S1, S2, C1, C2) to the selector unit as a function of a selected mode. Said control unit receives four signals phase shifted by 90° with respect to each other from a first master-slave divider and supplies a selected one of the four phase shifted signals. The selector unit includes a first amplifying branch (21) receiving two first phase shifted signals (F2I, F2Ib), a second amplifying branch (22) receiving two second phase shifted signals (F2Q, F2Qb), and a selection element (23) connected to each branch. The first control signals (S0, S1, S2) are supplied to the first and second branches, and to the selection element for selecting one of the four phase shifted signals (F2) at one output in a determined division period. The selector unit (11) includes switching means (24, 26) controlled by second control signals (C1, C2) for disconnecting the electric power supply to one of the selection branches when the other…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.