Phase detector
US6762626B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 24, 2003 |
| Grant date | Jul 13, 2004 |
| Priority date | — |
| Expiry date | Apr 24, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03D13/004
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A phase detector for use in conjunction with a delay locked loop is provided. Programmable delay elements insert an adjustable delay in a received data stream. The programmable delays stress the setup and hold times of the incoming data. Phase detector sampling logic detects the phase difference between a nominal center of the data window, and the limits on the setup (early) edge of the data value window, and the hold time limit (late time) edge of the data valid window (“guardbands”). A data signal arriving earlier than an early guardband or later than a late guardband may not be correctly sampled, and a guardband failure may be said to have occurred. A state machine detects such guardband errors and provides corrective feedback signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.