Shuffler apparatus and related dynamic element matching technique for linearization of unit-element digital-to-analog converters
US6762702B2 · kind B2 · utility
8Cited by
11References
16Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 22, 2002 |
| Grant date | Jul 13, 2004 |
| Priority date | — |
| Expiry date | Aug 22, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/502
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A data shuffler apparatus shuffles input bits to perform dynamic element matching. The shuffler apparatus includes N input shufflers, each input shuffler having N input terminals and N output terminals, each input terminal of each input shuffler receiving a respective one of the input bits. The apparatus also includes N output shufflers, each output shuffler having N input terminals and N output terminals, the input and output shufflers being interconnected such that each of the N output terminals of each input shuffler is connected to a respective input terminal of a different one of the N output shufflers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.