Cascadable content addressable memory (CAM) device and architecture
US6763426B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 28, 2002 |
| Grant date | Jul 13, 2004 |
| Priority date | — |
| Expiry date | Oct 4, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C15/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, a CAM system (100) may include a plurality of CAM devices (102-0 to 102-n) arranged in cascade configuration. A CAM system (100) may include an input connection (104) that receives a request to perform a particular operation and an output connection (106) on which a CAM system (100) may provide a single response based on responses from each CAM device (102-0 to 102-n). In one particular approach, a request may flow through CAM devices (102-0 to 102-n) in a single direction from a first CAM device (102-0) to a last CAM device (102-n). Similarly, responses to requests may be generated in the same direction, from a first CAM device (102-0) to a last CAM device (102-n).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.