Conformal surface silicide strap on spacer and method of making same
US6765269B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 26, 2001 |
| Grant date | Jul 20, 2004 |
| Priority date | — |
| Expiry date | Jan 26, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31155
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor structure is provided that includes a gate, a dielectric spacer located adjacent to a sidewall of the gate, a source/drain region, and a continuous silicide strap located over the gate, the dielectric spacer and the source/drain region. The silicide strap provides an electrical connection between the gate and the source drain region. In one embodiment, the silicide strap is formed by a method that includes the steps of (1) implanting a semiconductor material, such as silicon, into upper surfaces of the gate, the dielectric spacer, and the source/drain region, (2) depositing a refractory metal over the implanted semiconductor material, and (3) reacting the refractory metal with the implanted semiconductor material, thereby forming the continuous silicide strap at the upper surfaces of the gate, the dielectric spacer and the source/drain region. Advantageously, the dielectric spacer does not need to be removed prior to forming the silicide strap.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.