Phase locked loop demodulator and demodulation method using feed-forward tracking error compensation
US6765435B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 23, 2002 |
| Grant date | Jul 20, 2004 |
| Priority date | — |
| Expiry date | Dec 23, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03D3/248
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In embodiment, the present invention is directed to a PLL phase demodulator that utilizes feed-forward error correction. The feed-forward error correction may occur by calibrating an equalizer to possess transfer function that emulates the modulation response curve of the VCO of the PLL phase demodulator. In operation, the equalizer may receive the filtered and integrated version of the error signal produced by the phase detector of the PLL. The equalizer filters the received signal according to the calibrated transfer function. The output of the equalized is provided to a adder to combine the equalized signal with the error signal produced by the phase detector. A similar arrangement including a suitably calibrated equalizer may be utilized to address phase tracking error in a PLL frequency demodulator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.