Pixel pages using combined addressing
US6765579B2 · kind B2 · utility
Assignees
Inventor
Key dates
| Filing date | Feb 13, 2002 |
| Grant date | Jul 20, 2004 |
| Priority date | — |
| Expiry date | Aug 20, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N7/0132
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Methods and apparatus for implementing a pixel page system providing pixel pages using combined addressing. In alternative implementations, the system stores and retrieves data other than pixel data. In one implementation, a pixel page system includes: a data source, providing pixel data for pixels in a first order, where each pixel is in a frame of pixels, the frame having horizontal rows of pixels, vertical columns of pixels, a first section of pixels, and a second section of pixels; a data destination, receiving pixel data for pixels in a second order; at least one memory device, each memory device having a plurality of memory pages including a plurality of memory locations divided between a first memory page section and a second memory page section, each memory location having an address; and where pixel data for each pixel corresponds to an entry in one of a plurality of pixel pages, each pixel page having a plurality of pixel page rows each including a plurality of pixels and a plurality of pixel page columns each including a plurality of pixels, and each pixel page corresponds to a respective memory page, and pixels in the first section of pixels are in a first pixel page se…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.