System and method for implementing a delta-sigma modulator integrity supervisor
US6765954B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 16, 2000 |
| Grant date | Jul 20, 2004 |
| Priority date | — |
| Expiry date | Aug 22, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0079
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A system and a method for constructing a signal integrity supervisor capable of both detecting and triggering an appropriate response when transmit path signals indicate a potential damaging transmitter operating mode. The system and method of the present invention takes advantage of the inherent property of a Delta-Sigma Modulator (DSM) which makes the probability of encountering a long string of consecutive ones or zeroes during nominal operation very small. The signal integrity supervisor ensures safe transmitter operation by monitoring the data and the clock inputs to a digital to analog converter. The system may comprise a data signal supervisor and a clock signal supervisor. The data supervisor may comprise a comparator and a counter and may be configured to power down a line driver upon detecting a data stream having a continuous voltage level. The clock detector may comprise a pair of monostable circuits, an inverter, and a NAND gate and may be configured to reset the transmitter if a “missing” clock signal state is detected. The present invention can also be viewed as providing a method for preventing a transmission unit from forwarding signals that may result …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.