Packet-based direct memory access
US6766383B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 27, 2000 |
| Grant date | Jul 20, 2004 |
| Priority date | — |
| Expiry date | Dec 28, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Packet-Based Direct Memory Access. The present invention overcomes the oftentimes hardware consumptive and complex implementation of conventional direct memory access (DMA) that employs descriptors. The descriptors that must are employed by conventional DMA must be set up by software, and the handshaking between the hardware and software is typically very cumbersome. The packet-based DMA performed in accordance with the present invention is operable and adaptable to various types of cell-based DMA modes. A flow control regulator, or flow control state machine, is used to control the packet-based DMA performed in accordance with the present invention. Two different multiplexors (MUXs) are employed, one for each of the transmit and the receive packet-based DMA transfers, to select the various cases of packet-based DMA. The present invention is operable within various modes including asynchronous transfer mode (ATM) cell-based asynchronous digital subscriber loop (ADSL) applications. An efficient implementation using registers to control the packet-based DMA transfers is provided by the present invention.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.