Computer architecture with dynamic sub-page placement
US6766424B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 9, 1999 |
| Grant date | Jul 20, 2004 |
| Priority date | — |
| Expiry date | Jan 15, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/652
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multiprocessor system, where the latencies to access areas of memory have different values, provides the capability of having the operating system use large page sizes while dynamic page placement manipulates subsets of the large pages without affecting translation look-aside buffers in the processors. A sub-page support structure is inserted between the processor and the network interface to remote memory that on a remote memory access determines if a local copy of the data exists and, if it does, to change the remote access to a local access. Where a sub-page in a remote memory has been migrated to a third UMA cell, the sub-page support structure also instructs the processor of the new memory location or passes the access along to the correct UMA cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.