Compressing information using CAM for narrow bit pattern output
US6766488B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 29, 2001 |
| Grant date | Jul 20, 2004 |
| Priority date | — |
| Expiry date | Feb 4, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/261
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data compression device that serves the purpose of receiving large numbers of bits from inside a microcontroller or device under test which are fed to the data compression device featuring a content addressable memory and associated comparators that will recognize recurring digital data patterns. Each recognized large bit pattern will translate to a small bit numeric value that is output on an encoder output trace port. The trace port refers to the actual physical pins on the outside of the compression device that will be connected to the emulation or tracing instrument recording the sequence of patterns coming out from these very few pins.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.