Processor sharing technique for communications and other data processing on a same processor
US6766516B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 24, 1999 |
| Grant date | Jul 20, 2004 |
| Priority date | — |
| Expiry date | Nov 24, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/105
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The computational load imposed by communications software executed on a general purpose processor can be significantly reduced by exploiting periods during an active connection when no data is being received. In particular, execution of many receive path signal processing algorithms can be disabled when no data is being received. The transmit path continues output modulation as with a normal connection, so as to trick a remote communications device into believing the connection is still normal. However, substantial portions of the local receive path can be disabled, thereby reducing computational load on the general purpose processor and freeing additional compute cycles for application and/or operating system program use.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.