Low voltage receiver circuit and method for shifting the differential input signals of the receiver depending on a common mode voltage of the input signals
US6768352B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 13, 2002 |
| Grant date | Jul 27, 2004 |
| Priority date | — |
| Expiry date | Nov 13, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/028
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An improved communication system, receiver, and method are provided that can reduce input voltages received by the receiver whenever those voltages extend upward to the maximum common-mode voltage range. A detect circuit determines whether the input voltages are at or near the maximum range. If so, the detect circuit sends a control signal to a level shift circuit which will reduce the input voltages by a predefined amount. The reduced voltages can then be forwarded to a sense circuit which preferably operates at a power supply voltage that is less than the maximum differential input voltage (i.e., the maximum voltage on the differential pair of signals), or less than the maximum common-mode voltage of the differential input signals. The sense circuit can thereby operate at a relatively wide common-mode voltage range, and utilizes a lower power supply voltage. The sense circuit can also be made up of a relatively simple differential pair of transistors with corresponding resistor loads in order to sense a differential input voltage range of, for example, 800 millivolts to 2.4 volts prior to voltage reduction, and 800 millivolts to 2.0 volts after voltage reduction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.