Patent · US Expired

Electrostatic discharge protection structures for high speed technologies with mixed and ultra-low voltage supplies

US6768616B2 · kind B2 · utility

98Cited by

35References

14Claims

0Family size

Assignees

Sarnoff Corporation · US
Sarnoff Europe · BE

Inventors

Markus Mergens · Plainsboro, US
Cornelius Christian Russ · Diedorf, DE
John Armer · Middlesex, US
Koen Gerard Maria Verhaege · Gistel, BE

Key dates

Filing date	Mar 15, 2002
Grant date	Jul 27, 2004
Priority date	—
Expiry date	Mar 15, 2022

Classification

Technology area (CPC H)Electricity
CPC primaryH10D8/25
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

An electrostatic discharge (ESD) protection circuit in a semiconductor integrated circuit (IC) having protected circuitry. In one embodiment, the ESD protection circuit includes a pad, adapted for connection to a protected circuit node of the IC, and an ESD protection device, which is coupled between the pad and ground. A diode turn-on device is coupled in a forward conduction direction from the pad to a first gate of the ESD protection device. In a second embodiment, the ESD protection circuit is an SCR having an anode coupled to a first voltage supply line, and a cathode coupled to ground. A parasitic capacitance is coupled between each the voltage supply line and the grounded cathode.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.