Methods and apparatus for manifold array processing
US6769056B2 · kind B2 · utility
22Cited by
7References
30Claims
0Family size
Assignee
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Key dates
| Filing date | Sep 24, 2002 |
| Grant date | Jul 27, 2004 |
| Priority date | — |
| Expiry date | Sep 24, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/8023
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A manifold array topology includes processing elements, nodes, memories or the like arranged in clusters. Clusters are connected by cluster switch arrangements which advantageously allow changes of organization without physical rearrangement of processing elements. A significant reduction in the typical number of interconnections for preexisting arrays is also achieved. Fast, efficient and cost effective processing and communication result with the added benefit of ready scalability.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.