Method to simplify and speed up design rule/electrical rule checks
US6769099B2 · kind B2 · utility
6Cited by
13References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 12, 2002 |
| Grant date | Jul 27, 2004 |
| Priority date | — |
| Expiry date | Aug 7, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/398
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method, apparatus and computer program product for checking of integrated circuit design files using rules files. Each of the rules files has a rule associated therewith. The rules are sequentially compared with objects associated with the design files in an object-to-check-pool (OTCP). The sequence in which the rules are compared to objects in the OTCP is arrange to maximize a probability of determining whether design characteristics of the objects in the OTCP satisfies all rules associated with the rules files while minimizing a number of rules that must be compared with the OTCP.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.