Metal-oxide-silicon device including nanometer scaled oxide structure to enhance light-emitting efficiency
US6770903B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 23, 2002 |
| Grant date | Aug 3, 2004 |
| Priority date | — |
| Expiry date | Sep 23, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/00
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A metal-oxide-silicon (MOS) device that at least includes a silicon-based substrate, a nanometer scaled oxide layer formed on the silicon-based substrate and a metal layer formed on the oxide layer, is disclosed. The present invention basically uses a nanometer scaled oxide structure that result in a non-uniform tunneling current to enhance light-emitting efficiency. The manufacturing steps of the MOS device according to the present invention are quite similar to those of conventional MOS device, so the MOS device according to the present invention can be integrated with the current silicon-based integrated circuit chip. Further the application fields of the silicon-based chip and material can be extended. The cost of MOS device can be reduced and its practicality can be increased.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.