Semiconductor device having counter and channel impurity regions
US6770944B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 26, 2002 |
| Grant date | Aug 3, 2004 |
| Priority date | — |
| Expiry date | Nov 26, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/85
Abstract
A semiconductor device has a first semiconductor region formed in a semiconductor substrate and having a first conductivity type due to first-conductivity-type active impurities contained in the first semiconductor region, and a second semiconductor region formed between the first semiconductor region and the surface of the semiconductor substrate and having a second conductivity type due to second-conductivity-type active impurities contained in the second semiconductor region. The second semiconductor region contains first-conductivity-type active impurities whose concentration is zero or smaller than a quarter of a concentration of the second-conductivity-type active impurities contained in the second semiconductor region. An insulating film and a conductor are formed on the second semiconductor region. Third and fourth semiconductor regions of the second conductivity type are formed at the semiconductor surface in contact with the side faces of the second semiconductor region. This semiconductor device is capable of suppressing net impurity concentration variations as well as threshold voltage variations to be caused by a short channel effect or manufacturing variations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.