Frequency control for clock generating circuit
US6771134B2 · kind B2 · utility
10Cited by
14References
29Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 2, 2002 |
| Grant date | Aug 3, 2004 |
| Priority date | — |
| Expiry date | May 9, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/18
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A clock generating circuit is provided that includes a plurality of distributed ring oscillators to drive a clock distribution network. Multiplexing devices may select a length or delay of each of the ring oscillators. The variable length or delay may thereby adjust the frequency of the clock generating circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.