Patent · US Expired

Loop optimization with mapping code on an architecture

US6772415B1 · kind B1 · utility

69Cited by

4References

47Claims

0Family size

Assignee

INTERUNIVERSITAIR MICRO-ELECTRONICA CENTRUM VZW · BE

Inventors

Koen Danckaert · Asse, BE
Francky Catthoor · Temse, BE

Key dates

Filing date	Jan 31, 2000
Grant date	Aug 3, 2004
Priority date	—
Expiry date	Jan 31, 2020

Classification

Technology area (CPC G)Physics
CPC primaryG06F8/452
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A loop transformation step, to be performed on code and improving data transfer and storage, while executing said transformed code on a parallel processor, is disclosed. Improval of the data locality and regularity of the algorithm, described by said code, is aimed at. Said loop transformation step works globally and is feasible for realistic code sizes.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.