Method of forming a thin film transistor
US6773969B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 24, 2003 |
| Grant date | Aug 10, 2004 |
| Priority date | — |
| Expiry date | Mar 24, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6746
Abstract
A gate of a thin film transistor (TM is formed on a surface of a substrate. A gate insulating (GI) layer and an amorphous silicon layer are then sequentially formed on the gate. A dehydrogen treatment is performed thereafter, and a re-crystallizing process is performed to transform the amorphous silicon layer into a crystalline silicon layer. Then, a doped n+ layer is formed on the gate, and portions of the doped n+ layer and the crystalline silicon layer are removed thereafter. Finally, a source and a gate of the thin film transistor are formed on the gate, and a passivation layer Is formed to cover the source and the gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.