Small area cascode FET structure operating at mm-wave frequencies
US6774416B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 16, 2001 |
| Grant date | Aug 10, 2004 |
| Priority date | — |
| Expiry date | Aug 2, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/83
Abstract
A small area cascode FET structure capable of operating at mm-wave frequenices cascades a common-source (CS) FET with a common gate (CG) FET, in a smaller physical area than conventional cascode FET structures. The small area of the cascode FET structure is partially achieved by using small source via grounds, requiring a thin gallium arsenide substrate (typically between 50 and 70 microns thick). The overall cascode area is reduced further, by having the two FETs share a common node. This common node is the output drain manifold of the CS FET, which is also an input source finger of the CG FET. In addition, small via grounds within the MIM capacitors and CS FET, which provide the ground connection to the gate manifolds of the CG FET, further reduce circuit area. Advantageously, the small area cascode FET can be applied to many different MMICs to reduce MMIC area requirements and cost.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.