Method and circuit for compensating MOSFET capacitance variations in integrated circuits
US6774644B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 10, 2002 |
| Grant date | Aug 10, 2004 |
| Priority date | — |
| Expiry date | Jun 20, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/0231
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method for tracking the MOS oxide thickness by the native threshold voltage of a “native” MOS transistor without channel implantation for the purpose of compensating MOS capacitance variations is achieved. The invention makes use of the fact that in MOS devices the threshold voltage is proportionally correlated to the oxide thickness of said MOS device. Said threshold voltage can therefore be used to build a reference voltage Vx+Vth which accurately tracks the MOS capacitance variations in integrated circuits. Circuits are achieved to create a frequency reference and a capacitance reference using said method. Additionally a method is introduced to create a capacitance reference in integrated circuits using said MOSFET capacitors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.