Amplifier with a MOS output stage
US6774726B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 17, 2002 |
| Grant date | Aug 10, 2004 |
| Priority date | — |
| Expiry date | Dec 17, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F1/52
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An amplifier including first, second, and third series-connected stages, the third stage including a MOS output transistor having its source or drain forming an output terminal of the amplifier, including means for detecting the transition from a first operating state of the output transistor in which the drain current varies little with the voltage between the drain and the source to a second state in which the drain current varies substantially proportionally to the voltage between the drain and the source; and means for, upon detection of such a transition, having the voltage gain of the amplifier and/or the product between the bandwidth of the amplifier and the voltage gain of the amplifier at the upper limit frequency of the bandwidth drop.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.