Instruction scheduling based on power estimation
US6775787B2 · kind B2 · utility
59Cited by
9References
30Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 2, 2002 |
| Grant date | Aug 10, 2004 |
| Priority date | — |
| Expiry date | Aug 21, 2022 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In an embodiment, an apparatus includes a memory to include at least one power value associated with at least one instruction. The at least one power value indicating an amount of power required to execute the at least one associated instruction by the apparatus. The apparatus also includes an instruction scheduler to receive the at least one power value and the at least one instruction. The instruction scheduler is to schedule the at least one instruction for execution by at least one functional unit based on the at least one associated power value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.