High linearity digital-to-analog converter
US6778121B2 · kind B2 · utility
9Cited by
4References
19Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 13, 2003 |
| Grant date | Aug 17, 2004 |
| Priority date | — |
| Expiry date | Jun 13, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/804
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A digital-to-analog converter (DAC) with high linearity includes a switched capacitor amplifier removably coupled to a capacitor array. The result of the conversion by the capacitor array is sampled by the switched capacitor amplifier directly from the capacitor in the most significant cell in the array. The switched capacitor amplifier includes a memory capacitor and a feedback capacitor. The memory capacitor provides the initial output voltage corresponding to the result of the conversion when coupled to the capacitor array and stores the output voltage while the feedback capacitor is reset.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.