Reconfigurable hardware filter for texture mapping and image processing
US6778188B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 28, 2002 |
| Grant date | Aug 17, 2004 |
| Priority date | — |
| Expiry date | Jun 13, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T15/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A programmable filter comprising a tree of computational units, where each computational unit is configured to receive multiple inputs and generate multiple outputs, where the tree receives a set of input operands and generates output operands, where, in a sum of products mode, the output operands of the tree comprise a sum of products of the input operands by corresponding N-bit coefficients, where N is a positive integer, where, in a linear interpolation mode, each of the output operands of the tree comprise linear interpolations of at least two of the input operands, wherein coefficients of the linear interpolations have (N/2) bits of precision.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.