Dynamic random access memory device externally functionally equivalent to a static random access memory
US6778461B2 · kind B2 · utility
4Cited by
6References
38Claims
0Family size
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Key dates
| Filing date | Apr 17, 2002 |
| Grant date | Aug 17, 2004 |
| Priority date | — |
| Expiry date | Oct 14, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/406
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A random access memory (RAM) includes at least two memory banks. Each memory bank includes an array of dynamic random access memory (DRAM) cells, and self-refresh circuits for continuously submitting the DRAM cells to a refresh operation independent of the other memory banks. A first circuit selectively accesses one of the memory banks in response to an external access request. A second circuit suspends the refresh operation in the accessed memory bank while processing the external access request, and while the refresh operations in non-selected memory banks are not suspended.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.