Metal-programmable single-port SRAM array for dual-port functionality
US6778462B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 8, 2003 |
| Grant date | Aug 17, 2004 |
| Priority date | — |
| Expiry date | Jun 23, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention provides a method and apparatus for providing dual-port capability to an SRAM array. The internal nodes of two single-port memory cells are connected to each other through metal-layer programming to form a dual-port memory cell. In a preferred embodiment, a split word line design is used for each single-port memory cell, to facilitate dual-port memory access while minimizing the need for IC layout space. An additional benefit of the present invention is that it allows “slices” of a memory array to be converted into dual-port memory, so as to allow both single-port and dual-port memory cells in the same memory array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.